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Please use this identifier to cite or link to this item: http://arks.princeton.edu/ark:/88435/dsp01m900nx81r
Title: VectorVisor: A Binary Translation Scheme for Throughput-Oriented GPU Acceleration
Authors: Ginzburg, Samuel
Advisors: Freedman, Michael J.
Contributors: Computer Science Department
Keywords: Compilers
GPGPU
WebAssembly
Subjects: Computer science
Issue Date: 2024
Publisher: Princeton, NJ : Princeton University
Abstract: Beyond conventional graphics applications, general-purpose GPU acceleration has hadsignificant impact on machine learning and scientific computing workloads. Yet, it has failed to see widespread use for server-side applications, which we argue is because GPU programming models offer a level of abstraction that is either too low-level (e.g., OpenCL, CUDA) or too high-level (e.g., TensorFlow, Halide), depending on the language. Not all applications fit into either category, resulting in lost opportunities for GPU acceleration. We introduce VectorVisor, a vectorized binary translator that enables new opportunities for GPU acceleration by introducing a novel programming model for GPUs.With VectorVisor, many copies of the same server-side application are run concurrently on the GPU, where VectorVisor mimics the abstractions provided by CPU threads. To achieve this goal, we demonstrate how to (i) provide cross-platform support for system calls and recursion using continuations and (ii) make full use of the excess register file capacity and high memory bandwidth of GPUs. We then demonstrate that our binary translator is able to transparently accelerate certain classes of compute bound workloads, gaining significant improvements in throughput-per-dollar of up to 2.9× compared to Intel x86-64 VMs in the cloud, and in some cases match the throughput-per-dollar of native CUDA baselines.
URI: http://arks.princeton.edu/ark:/88435/dsp01m900nx81r
Type of Material: Academic dissertations (Ph.D.)
Language: en
Appears in Collections:Computer Science

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