Device Evaluation and Design of GaN Power Converters

Abstract

The rapid development of high-performance semiconductors such as CPUs and GPUs has risen the demand for point-of-load converters to become smaller and more power dense as to not be the limiting factor when designing a motherboard. Consequently, there has been a drive for designing and manufacturing more efficient point-of-load converters based on new transistor technologies and packing methods. The first goal of this project is to evaluate the performance of state-of-the-art semiconductor devices and to provide key metrics relevant for selecting a device for a certain design, in particular integrated co-packed discrete trench MOSFETs (DrMOS) and Gallium Nitrade (GaN) transistors. The second part of the project will present the design of a high-frequency point-of-load converter based on the series capacitor buck topology for low voltage applications which incorporates an interleaved four phase design with coupled magnetics. The design also allows for two options for the control circuit corresponding to high and very high frequencies (up to 20MHz).