Please use this identifier to cite or link to this item: http://arks.princeton.edu/ark:/88435/dsp01fj236228c
DC FieldValueLanguage
dc.contributor.authorWharton, David-
dc.date.accessioned2014-07-22T18:30:15Z-
dc.date.available2014-07-22T18:30:15Z-
dc.date.created2014-05-05-
dc.date.issued2014-07-22-
dc.identifier.urihttp://arks.princeton.edu/ark:/88435/dsp01fj236228c-
dc.description.abstractThere are many trade-offs that arise when designing applications for embedded hardware, specifically algorithms for classification, operating on low-power embedded hardware with machine learning accelerators that necessitate good engineering decisions to be made. The trade-offs explored by this work are classification accuracy, energy consumption and mem- ory requirements. Three applications in the computer vision domain are the focus of this work.en_US
dc.format.extent68 pages*
dc.language.isoen_USen_US
dc.titleClassification Algorithms for Embedded Hardwareen_US
dc.typePrinceton University Senior Theses-
pu.date.classyear2014en_US
pu.departmentElectrical Engineeringen_US
pu.pdf.coverpageSeniorThesisCoverPage-
Appears in Collections:Electrical Engineering, 1932-2020

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