Adapting an Eye Tracking Algorithm for a Compute-In-Memory Unit

Abstract

The field of eye tracking examines how specific points of gaze can be predicted from measured positions of the eye. Many eye tracking methods rely on fast analysis of large image databases, but similar algorithms requiring substantial memory accesses are often limited by the hardware itself. In parallel fields, this issue has motivated the development of in-memory computing architectures, which improve efficiency by combining logic and storage in the same area of the hardware. Since few studies have used in-memory computing or hardware-driven approaches to better existing eye tracking methods, the goal of this thesis was to develop a machine learning algorithm for eye tracking and map it to an in-memory computing chip to assess for any improvement in energy use. This work was divided into three main steps. First, an existing neural network architecture for gaze prediction was simplified to maintain similar prediction accuracy with fewer convolutional layers. Next, this architecture was quantized to a lower level of bit precision. Finally, the network was mapped to an existing in-memory computing chip and executed directly from this specialized hardware. Energy models for the chip and for a non compute-in-memory CPU were used to compare the energy usage of the chip to that of a general-purpose processor. The in-memory computing unit was able to perform gaze prediction with similar accuracy to a general-purpose processor and was found to use only about 0.1% of the energy of a simple non compute-in-memory CPU. Some degradation in performance was observed but attributed to the SNR of the chip. In future steps, more complex networks can be mapped to the hardware to further evaluate its performance and examine ways to decrease the effects of noise.